An embodiment of the present invention relates to a reservoir capacitor of a semiconductor device and a method for fabricating the same, and more specifically, to a reservoir capacitor formed when a buried gage process is applied.
In general, a semiconductor device such as a Dynamic Random Access Memory (DRAM) comprises various micro-sized elements. In order to operate these micro-sized elements, the semiconductor device generates an internal voltage.
Meanwhile, the use of the internal voltage can generate noise, thereby destabilizing a voltage level. In order to inhibit the generation of noise, a reservoir capacitor having a large capacitance is fabricated. The reservoir capacitor is located in a peripheral circuit region where micro-sized elements are formed.
However, in the current buried gate, a storage node contact of a cell region is formed before a bit line pad of a peripheral circuit region is formed. That is, a gate of the cell region, the gate of the peripheral circuit region, a bit line of the cell region and the bit line pad of the peripheral circuit region are formed to have different heights.
As a result, the storage node contact of the cell region and the gate material of the peripheral circuit region, that is, a MOS capacitor, are formed to have the same height. When the reservoir capacitor is formed using the storage node contact, the storage node contact is formed in the MOS capacitor of the existing peripheral circuit region, so that the MOS capacitor and the reservoir capacitor cannot be used simultaneously.